Global leader in Electronic Design Automation (EDA) software and semiconductor IP. Every advanced chip in the world is designed using Synopsys tools. AGI Score: 9/10. | Analysis date: 2026-03-13
Synopsys scored 9/10 on AGI impact. AGI requires custom chips (Google TPUs, AWS Trainium, custom ASICs), and every single one is designed using Synopsys or Cadence tools. This is a duopoly with ~70% combined market share. Synopsys recently acquired Ansys ($35B) to add multi-physics simulation. At $79B market cap and 63x P/E, the question is whether the chip design explosion justifies the premium.
Synopsys provides EDA software tools and semiconductor IP used to design integrated circuits. Products span the entire chip design flow: logic synthesis, simulation, verification, physical design, signoff. Also provides silicon IP (processor cores, interfaces, security IP). Recently closed the Ansys acquisition to add simulation/analysis across physics domains. ~19,000+ employees. Revenue is ~90% subscription-based.
Duopoly with Cadence -- no one else can provide a complete chip design flow. Switching costs are extreme -- engineers spend years learning the tools, and chip design flows are deeply embedded in customer processes. IP blocks are designed into billions of chips (lock-in). AI-driven design tools (Synopsys.ai) create a data flywheel. Regulatory moat -- export controls mean non-US competitors face restrictions.
AGI drives chip design complexity and volume: (1) Custom AI accelerators (every hyperscaler is designing chips), (2) More complex chips at advanced nodes need more EDA tools, (3) AI-assisted chip design (using AI to design AI chips -- a meta-flywheel), (4) Synopsys.ai reduces design time from months to weeks, becoming essential. The Ansys acquisition adds "digital twin" simulation for data center thermal/power modeling.
| Item | FY2020 | FY2021 | FY2022 | FY2023 | FY2024 | FY2025 |
|---|---|---|---|---|---|---|
| Total Assets | $8.0B | $8.8B | $9.4B | $10.3B | $13.1B | $48.2B |
| PP&E (Net) | $484M | $472M | $483M | $557M | $563M | $697M |
| Cash | $1.2B | $1.6B | $1.6B | $1.6B | $4.1B | $3.0B |
| Goodwill | $3.4B | $3.6B | $3.8B | $4.1B | $3.4B | $26.9B |
| Intangible Assets | $254M | $279M | $386M | $374M | $195M | $12.7B |
| Total Liabilities | $8.0B | $8.8B | $9.4B | $10.3B | $13.1B | $48.2B |
| Long-Term Debt | $101M | $25M | $21M | $18M | $16M | $13.5B |
| Stockholders' Equity | $4.9B | $5.3B | $5.5B | $6.2B | $9.0B | $28.3B |
| Tangible Book Value | $1.3B | $1.4B | $1.3B | $1.7B | $5.3B | -$11.3B |
| Metric | FY2020 | FY2021 | FY2022 | FY2023 | FY2024 | FY2025 |
|---|---|---|---|---|---|---|
| Revenue | $3.7B | $4.2B | $5.1B | $5.8B | $6.1B | $7.1B |
| Operating Income | $620M | $735M | $1.2B | $1.3B | $1.4B | $915M |
| Net Income | $663M | $756M | $978M | $1.2B | $2.2B | $1.3B |
| EPS (Diluted) | $4.27 | $4.81 | $6.29 | $7.92 | $9.25 | $8.07 |
| Operating Cash Flow | $991M | $1.5B | $1.7B | $1.7B | $1.4B | $1.5B |
| CapEx | $155M | $94M | $18M | $22M | $32M | $24M |
| Free Cash Flow | $837M | $1.4B | $1.7B | $1.7B | $1.4B | $1.5B |
| Year | Shares Outstanding | Change |
|---|---|---|
| FY2020 | 151,135,000 | |
| FY2021 | 152,698,000 | +1.0% |
| FY2022 | 153,002,000 | +0.2% |
| FY2023 | 152,146,000 | -0.6% |
| FY2024 | 153,138,000 | +0.7% |
| FY2025 | 163,947,000 | +7.1% |
Current market cap: $79.0B. For 10x, need: $790.4B.
Current price: $412.63. 10x price: $4126.30.
At $79B, 10x = $790B. Would require revenue to grow from ~$6.1B to $40B+ at current margins. Very ambitious but not impossible if chip design becomes 5-10x larger market. More realistic: 3-5x over 10 years as chip design complexity explodes. Entry for strong returns: $250-300 range (P/E ~30-35x).
Ansys acquisition ($35B) creates integration risk and added $15B+ in goodwill/intangibles. Open-source EDA tools (OpenROAD) could eventually pressure pricing. Cadence is a strong competitor. If chip design consolidates (fewer companies designing chips), TAM shrinks. Export controls to China reduce addressable market. 63x P/E leaves no room for error.
Position in 52-week range: 16% from the bottom. -36.7% from 52-week high.
| Metric | Value | Notes |
|---|---|---|
| Market Cap | $79.0B | EDA/Chip Design Software |
| Trailing P/E | 63.2x | Earnings yield: 1.6% |
| Forward P/E | 24.2x | |
| Price / Book | 2.59x | |
| Price / Tangible Book | N/A | Tangible book/share: $-68.63 |
| EV/Revenue | 12.7x | |
| FCF Yield | 1.9% | FCF: $1.5B |
| Dividend Yield | N/A | No dividend |
| ROE | 5.5% |
Category: EDA/Chip Design Software | AGI Score: 9/10 | Confidence: high
AGI Reasoning: Synopsys is a massive AGI beneficiary. AGI systems require enormous compute, driving explosive demand for advanced chips—and Synopsys tools are essential for designing those chips. The company already integrates AI into EDA (Synopsys.ai suite), positioning it to benefit recursively: AGI improves chip design → better chips enable more powerful AGI → cycle repeats. Strategic moats are extremely strong: decades of accumulated design libraries, foundry partnerships, and mission-critical software with high switching costs. Disruption risk is low—AGI still needs physical silicon, and Synopsys tools are the industry standard for designing it. Minimal innovation risk: even if AGI invents new chip architectures, those designs still require EDA tools to manufacture. The Ansys acquisition expands TAM into broader engineering simulation, benefiting from AGI-driven hardware innovation across industries. This is a foundational infrastructure play on AGI scaling.
What we need to go deeper on:
Data sources: SEC EDGAR XBRL (CIK 883241), yfinance, 10-K filing. Analysis date: 2026-03-13.